For my EECS 645: Computer Architecture, the final project of the course involved us designining our very own CPU microarchitecture that accepts a subset of MIPS. It was quite fun learning the intricacies of how CPUs are built, with all the pipelines, hazards, etc. In many ways, after this course, I fear no assembly and reading it comes more naturally. The only caveat was that we were writing it all in a parallel programming paradigm in VHDL. I don’t really want to touch VHDL in the near future.